16 lines
443 B
Markdown
16 lines
443 B
Markdown
# Feb 3, 2025 | ECE2700; HW 2 | Boehme, James
|
|
---
|
|
# 1.
|
|
## Problem Statement:
|
|
> Describe in Verilog, a full adder that accepts the following three one bit inputs: $x$, $y$, and the carry-in bit $c$; and it generates the following two one-bit outputs: the sum bit $sum$ and the carry-out bit $cout$.
|
|
|
|
> Part a) For the first full-adder design, describe the $sum$ output using
|
|
## Given
|
|
## Find
|
|
|
|
---
|
|
# <u>Solution:</u>
|
|
|
|
---
|
|
---
|