1.8 KiB
1.8 KiB
- Output depends on input and past behavior
- Requires use of storage elements
Latches
SR Latch
SR stands for Set/Reset, and functions like so:
- When a signal comes into
S
,Q_a
is set on and stays on until a signal comes intoR
, at which point the output (Q_a
) is reset, back to zero. S
andR
are interchangeable, it just impacts whetherQ_a
orQ_b
is set/reset. Truth table:
S |
R |
Q_a |
Q_b |
---|---|---|---|
0 | 0 | 0/1 | 1/0 |
0 | 1 | 0 | 1 |
1 | 0 | 1 | 0 |
1 | 1 | 0 | 0 |
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Gated Latch
A gated latch is similar to a basic latch, but the output only changes when clk = 1
.
D Latch
A D latch has two inputs, clk
and data
. When clk
is high, data
is stored.
Flip Flops
A latch, but the output only changes on one of the clock edges
- Can be a rising edge latch or a falling edge latch
JK Flip Flop
Similar to an SR flip flop, a JK flip flop has set/reset inputs, but when both inputs are high, then the output is toggled.
T Flip Flop
A T Flip Flip, or a toggle flip flop has two inputs:
clk
- Clock inputT
- WheneverT
goes from low to high, the output toggles its state
Registers
Shift Register
!
Above is a simple shift register.
Parallel Shift Register
A parallel shift register has 4 inputs, 4 outputs, a serial input, and a shift/load input.
When the load input is high, the input is stored into the register. When the shift input is high, the registers are shifted and the serial input is read into the new space.
Counters
A 3-bit Up-counter
Synchronous Sequential Circuits
- A synchronous circuit is clock driven, while an asynchronous circuit is not.