vault backup: 2025-02-03 10:04:19

education/computer engineering/ECE2700/Verilog/Modules.md

@@ -38,4 +38,6 @@ There are 3 kinds of ports:
 - `inout`: Inout ports can send *and* receive values.
 
 ### Port types
-If no 
+If no type is defined, ports are implicitly defined as *nets* of type `wire`.
+
+> In verilog, the term *net* refers to network, and it refers to a connection that joins two or more devices together.

education/computer engineering/ECE2700/Verilog/Types.md

@@ -0,0 +1,2 @@
+There are two main categories of data types in Verilog. These ty
+# Nets