arc/notes
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

vault backup: 2025-03-17 10:29:18

Browse Source
This commit is contained in:
arc 2025-03-17 10:29:18 -06:00
parent 0fa73dc599
commit 75970e44ad
2 changed files with 5 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
education/computer engineering/ECE2700/Sequential Circuits.md
View File

@ -39,4 +39,8 @@ Above is a simple shift register.
## Parallel Shift Register ## Parallel Shift Register
A parallel shift register has 4 inputs, 4 outputs, a serial input, and a shift/load input. A parallel shift register has 4 inputs, 4 outputs, a serial input, and a shift/load input.
When the *load* input is high, the input is stored into the register. When the *shift* input is high, the registers are shifted and the serial input is read into the new space. When the *load* input is high, the input is stored into the register. When the *shift* input is high, the registers are shifted and the serial input is read into the new space.
# Counters
## A 3-bit Up-counter
![[Pasted image 20250317102911.png]]

BIN
education/computer engineering/ECE2700/assets/Pasted image 20250317102911.png Normal file
View File

Binary file not shown.
Side by Side

After

Width:  |  Height:  |  Size: 331 KiB