# Carry-Select Adder
A carry select adder is built using two ripple carry adders, and multiplexing them together based off of the value of $c_{in}$. This is done for performance reasons, because when adding two numbers $x$ and $y$, we know $x$ and $y$ *before* we know the value of $c_{in}$. This means we can compute what the output of $x + y + c_{in}$ would be for $c_{in} = 0$ and $c_{in} = 1$ at the same time, then just toggle between the two possible values given the *actual* value of $c_{in}$.

The delay is calculated like so:
1. Given the delay of a full adder is $k$, and the delay of a 2 to 1 mux is $\frac{1}{m}k$,
2. then the delay of a 4 bit ripple carry adder is $4k$, because it's 4 full adders chained together, running sequentially.
3. This means that the delay of a 4 bit carry select adder is $4k + \frac{k}{m}$ 